C4ISR Forum MT 5/2022 · 51 The SOSA Technical Standard also includes the definition of signals and signal characteristics as well as the means by which different information is communicated to different entities. A major portion of this capability has been adopted from the Modular Open RF Architecture (MORA), which itself is an extension of the VICTORY [Vehicular Integration for C4ISR/EW Interoperability] architecture, which was developed to ease the integration of RF systems in ground vehicles. MORA is important to EW systems in that it adds low-latency transport capability and streaming functions which are critical to time-sensitive applications. (Figure 4) Putting all this together, the SOSA Technical Standard provides a solid framework for supporting interchangeable entities, which are key to driving interoperability, modularity, portability, and upgradeability for new EW capabilities. An example of a MOSA module designed for use in deployed EW applications is CurtissWright’s 3U OpenVPX form factor CHAMP-XD3 security-enhanced, cognitive, rugged digital signal processor (DSP) engine. Aligned with SOSA Technical Standard 1.0, this rugged card is designed for use in very compute-intensive industrial, aerospace, and defense applications, enabling developers of High Performance Embedded Computing (HPEC) systems to take full advantage of the unmatched performance of today’s latest Intel Ice Lake Xeon D-1700 architecture. The CHAMP-XD3 couples Intel’s AVX512 floating-point capability with VNNI machine learning instruction set as well as 3 banks of memory, 40GbE data plane and up to 16 lanes of PCIe for wide memory and IO bandwidth to insure no bottlenecks. The product also features the Xilinx Zynq Ultrascale+ FPGA with enhanced security capabilities. Figure 4: The Curtiss-Wright CMOSS Starter Kit 3U OpenVPX system integrates a VPX3-687 VICTORY network switch module, VPX3-673 A-PNT card, and VPX3-1260 SBC in a SOSA Technical Standard 1.0 aligned chassis. processor card via an FMC mezzanine mounted on that card, or directly to the card via connectors on the front panel. In either case, there are front-panel connections to cables, and from there, connections to the sensors themselves. In the last few years, however, the VITA 66 and VITA 67 specifications started adding provisions for connectors on the backplane that could support optical or coax. For coax, the connectors take the analog signals from the board and connect to high density cables on the backplane. For optical signals, the connectors can interface to blindmate cables on board or include a transceiver that translates signals on onboard copper traces on the board to optical signals on the backplane cables. Today, we are seeing a mixture of analog sensors and smart sensors with optical backhauls being deployed; both types are critical and in many cases may be mixed in the same system. The analog or optical interface is another area that can benefit from standardization. With a proliferation of cable connector types, densities, and pin assignments used on different front-end cards, having a common set of configurations makes it easier to support and easier to substitute in a different PIC. The challenge remains, however: how to do this in a way that also provides the flexibility to handle the wide range of antennae and sensor front ends that exist? Supporting the higher-density connectors as well as prioritizing the order of pin assignments and providing a few options helps that problem significantly. The SOSA Technical Standard defines connections not only at the PIC level but also at the chassis level. Denis Smetana is a senior product manager for DSP products at Curtiss-Wright Defense Solutions in Ashburn, VA. He has over 30 years’ experience in pertinent device and product development management, and has over 15 years exposure to COTS ISR products. Figure 2: ANSI/VITA 65.0 Payload Slot Profile SLT3-PAY-1F1U1S1S1U1U2F1H-14.6.11-n Figure 3: ANSI/VITA 65.0 Payload Slot Profile SLT3-PAY-1F1U1S1S1U1U4F1J
RkJQdWJsaXNoZXIy MTM5Mjg=