The SOSA Reference Architecture is intended to support EW sensors, radar, EO/IR [electro-optical/infrared], SIGINT [signals intelligence], and communications sensors. Within the SOSA Reference Architecture, at a plug-in card (PIC) level, there are a few physical attributes that lend themselves nicely to EW systems. The key to any EW system is the front-end sensor processor, which is typically a tuner or FPGA [field-programmable gate array] card. It is important that the front end of the system is capable of supporting a large amount of sensor I/O and can distribute this data across a high-performance fabric to other downstream plug-in cards in the system. (Figure 1) The primary ‘workhorse’ plug-in card profile (PICP), defined by the SOSA Technical Standard for 3U OpenVPX-based systems, is the payload PICP. This profile differs from the I/O-intensive PICP used for single-board computing (SBC) cards, in that it provides backplane apertures which can be used for optical or coax cables, as well as a wide expansion plane (EP) interface which can send data for downstream processing, and a data plane (DP) fabric interface for sending data through the network fabric. Two variants of the payload PICP [a primary (Figure 2) and secondary (Figure 3)] are shown in the figures where there is a tradeoff within the upper half of the backplane P2 connector, between more aperture space for sensor input/output versus a wider EP for downstream data processing. For EW systems, where both input and output signals are needed, the primary payload PICP in Figure 2, with wider aperture space, provides the capability for supporting a larger number of RF or optical transmit and receive signals. Either of these PICPs can support rear-panel fiber or coax interfaces, which are optimal for EW sensors. The rear-panel approach enables cabling to be handled in the sensor-processing chassis itself, eliminating the complex cable management problem that results from having a proliferation of cables at the front panel. More specifically, positioning the cables within the chassis rather than on the front panel eliminates the need to disconnect cables when replacing a PIC. This setup not only saves time but also reduces wear and tear on the connectors themselves, and overall, makes system integration and maintenance significantly easier. With new high-density connectors, developed by the market and standardized by VITA and The Open Group’s SOSA Consortium, the number of sensors supported is also much higher than can be supported with just the standard VPX connectors on the backplane, or with the types of connectors that are typically used on the front panel. In 6U OpenVPX systems, where more backplane pins are available, all processor profiles support one or two full connectors’ worth of apertures as well as wider DPs and EPs. Over the last 10 or so years, and until recently, it was the norm to have most EW analog signals brought into an FPGA card or front-end Electronic Warfare (EW) system designers must constantly respond to new threats and come up with appropriate ways to respond. EW is a continuously evolving domain, for which the concept of QRC [quick response capabilities] is vital to introducing new capacities rapidly and easily. These capabilities can range from those that correctly identify new threats to new techniques that nullify a threat. Techniques may involve jamming the incoming signal or distorting/ delaying the natural response, to confuse whatever weapons may be zeroed in on the target platform. One of the main differences between radar and EW system architectures is that radar systems are primarily receivers of sensor data. While some radar systems may transmit energy to excite the targets, other radar systems may be completely passive. EW sense-and-response systems, on the other hand, have significantly more bidirectional activity compared to a radar system. Moreover, EW systems must respond after sensing a signal as close to instantaneously as possible. That capability means that low latency is essential to enable signals to get in and out of the system as quickly as possible. Rapidly responding to new threats, in real time, in the current dynamic environment, is one of the primary drivers behind the US DoD’s mandate to adopt a Modular Open Systems Approach (MOSA) for procurement across the Army, Air Force, and Navy. The MOSA mandate drives a modular approach to system design that lowers the cost of integration and speeds the deployment of new capabilities to address emerging threats. The MOSA directive has greatly accelerated the adoption of open system standards, such as the US Army CCDC C5ISR Center’s Army’s Command, Control, Communications, Computers, Intelligence, Surveillance, and Reconnaissance (C4ISR) Modular Open Suite of Standards (CMOSS) and the Sensor Open Systems Architecture (SOSA) Technical Standard, supported by the three services and led by The Open Group’s SOSA Consortium. To help speed the development and deployment of new EW capabilities, the Open Group SOSA Consortium, backed jointly by the US Army, Air Force and Navy, establishes guidelines for C4ISR systems. The objective of SOSA is to allow flexibility in the selection and acquisition of sensors and subsystems that provide sensor data collection, processing, exploitation, communication, and related functions over the full life cycle of the C4ISR system. The SOSA Technical Standard (currently publicly available as rev. 1.0), facilitates these objectives by providing a definition of SOSA modules, hardware elements (for example, plug-in cards), and software environments. Within the SOSA Reference Architecture, SOSA Modules were created as logical entities that encompass behaviors and functions. SOSA Modules are instantiated in a variety of ways, with one example being the instantiation of SOSA modules for EW in software. The use of SOSA Modules (no matter how they are instantiated), along with their associated Quality Attributes and open and exposed interfaces, helps ensure that the EW system is able to adapt to the changing needs of spectrum warfare by making it easier to replace or upgrade modular pieces of the system. The ability to replace software or firmware to add a new capability to the EW system is critical because it means the ability to rapidly introduce new waveforms or techniques to address constantly changing threats. Denis Smetana, Curtiss-Wright Defense Solutions EW and the DoD’s MOSA Mandate 50 · MT 5/2022 C4ISR Forum Figure 1: Annapolis Micro Systems’ WILDSTAR 3XBP 3U OpenVPX FPGA processor is 100GbE-enabled and aligned with the SOSA Technical Standard. (All images via Curtiss-Wright Defense Systems)
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